FIG. 3 shows a cross sectional structure of a conventional antifuse according to Japanese Patent Laid-open No. 5-190677. The antifuse element comprises a first interlayer insulating film 1, a first metal interconnection layer 2, a lower electrode layer of antifuse element 3, a second interlayer insulating film 4, an aperture 4a formed through the second interlayer insulating film 4, an antifuse layer 5, an upper electrode layer 6 of the antifuse element, a second metal interconnection layer 8, and a barrier metal layer 7 disposed between the upper electrode layer 6 and the second metal interconnection layer 8.
The antifuse layer 5 is generally comprised of an amorphous silicon etc.; the upper electrode layer 6 and the lower electrode layer 3 are of a refractory metal such as titanium (Ti), and the first metal interconnection layer 2 and the second metal interconnection layer 8 are of an aluminum alloy.
Antifuses work as the insulating element in normal state; but when a voltage higher than the insulation breakdown voltage is applied on the antifuse layer 5 (programming), an electroconductive channel (hereinafter referred to a fuse link) is formed between the upper electrode layer 6 and the lower electrode layer 3, and the antifuse turns from an insulating element ("off" state) into a resistive element ("on" state).
In the logic semiconductor integrated circuits or the read-only memories (ROM) etc., the antifuse elements placed between interconnection lines are selectively electro-conducted to provide semiconductor integrated circuits with a specific function, or ROMs with a specific program.
A method for manufacturing a conventional antifuse element as shown in FIG. 3 will be described referring to cross sectional views of FIG. 4(a)-FIG. 4(d).
As FIG. 4(a) shows, a first interlayer insulating film 1 is formed on a semiconductor substrate (not shown) having specific circuit elements and insulating films integrated. After the surface is planarized, a first metal interconnection layer 2 and a lower electrode layer 3 are formed. Then a second interlayer insulating layer 4 is formed covering the lower electrode layer 3 and the first metal interconnection layer 2, and an aperture 4a is formed to expose a portion on which the antifuse element is to be formed, as shown in FIG. 4(b). An antifuse layer 5 comprised of an amorphous silicon etc. and an upper electrode layer 6 are formed as shown in FIG. 4(c). A barrier metal layer 7 and a second metal interconnection layer 8 are formed as shown in FIG. 4(d).
However, various problems have been found with the conventional antifuse elements. A problem is the difficulty in controlling the insulation breakdown voltage in "off" state. As the antifuse layer 5 is formed after an aperture is formed through the second interlayer insulating film 4, thickness of the layer at the corner shaped by inner wallsurface of aperture 4a and the lower electrode layer tends to be thinner than the other portion; furthermore, it is very difficult to control the thickness of the thinnest part to a specified value.
Because the antifuse layer 5 uses an amorphous silicon etc. as a constituent material, the polarity control of current/voltage characteristics of antifuses in "off" state, namely control of the dependence of leakage current on bias direction, is difficult, it is also difficult to suppress a high leakage current of antifuse element in "off" state, and during the manufacturing process of antifuse elements, the film of amorphous silicon etc. easily causes a peeling-off.
Because the upper electrode layer 6 and the lower electrode layer 3 of antifuse element are comprised of a refractory metal, if the film thickness of upper electrode layer 6 or lower electrode layer 3 of a fuse link portion to be formed during the programming of antifuse element is too thin the fuse link invades into the first metal interconnection layer 2 or the second metal interconnection layer 8, allowing the aluminum constituting the first metal interconnection layer 2 or the second metal interconnection layer 8 to diffuse into the fuse link. This deteriorates the reliability of antifuse element in "on" state.
In a case where titanium (Ti) is used as a refractory metal of upper electrode layer 6 and lower electrode layer 3, the titanium reacts with the amorphous silicon during heating in the process, which brings about an increasing dispersion in the insulation breakdown voltage of antifuse element in "off" state.
As the second interlayer insulating film 4 for separating the first matal interconnection layer 2 and the second metal interconnection layer 8 is used also as an insulating film for separating the lower electrode layer 3 and the upper electrode layer 6, the aperture 4a naturally has a large aspect ratio, making it difficult to control the thickness of the thinnest part of upper electrode layer 6.